1. Field of the Invention
The present invention relates to package substrates, semiconductor packages and methods of manufacturing the same, and, more particularly, to a package substrate for enhancing bonding strength, a semiconductor package and a method of manufacturing the same.
2. Description of Related Art
As the demands for high functionality of electronic products, as well as enhanced technology for package substrates having high intensity conductive pads in flip-chip type package continue to increase, several packaging types of electronic products have been developed.
FIG. 1 shows a cross-sectional view of a package substrate 1 according to the prior art. The package substrate 1 comprises an insulating layer 15, a first wiring layer 11, a second wiring layer 12, conductive vias 13, and third conductive pads 18.
The insulating layer 15 has opposing first and second surface 15a and surface 15b. The first wiring layer 11 has first conductive pads 111 embedded in and exposed from the first surface 15a. The second wiring layer 12 has second conductive pads 121 and conductive pads 122 embedded in and exposed from the second surface 15b. The insulating layer 15 has conductive vias 13 formed therein and electrically connected with the conductive pads 122. The third conductive pads 18 are formed on the first surface 15a of the insulating layer 15 and electrically connected with the conductive vias. Optionally, a conductive layer 16 is formed between the conductive pads 122 and the conductive vias 13 and between the insulating layer 15 and the conductive vias 13.
However, as the requirement for chip functionality continues to increase, the number of electrical connections required for the flip-chip to be connected to the package substrate must increases also, but this is limited by limited area for disposing the first conductive pads. Since the interface between the first conductive pads an the flip chip is a plane surface, which when reduced in surface area would result in poor bonding strength between the first conductive pads and the solder materials of the conductive bumps on the chip, as well as non-wetting problem, causing the reliability and yield of the final product to be greatly reduced.
Thus, there is an urgent need for solving the foregoing problems.